* Implementation contributed by Remy Muller
*****************************************************************/
-// bus(n) : n parallel cables
-bus(2) = _,_; // avoids a lot of "bus(1)" labels in block diagrams
-bus(n) = par(i, n, _);
// twiddle_mult(n) : n parallel cables
twiddle_mult(k, n) = _, W(k, n) : pcplx_mul;
-// selector(i,n) : select ith cable among n
-selector(i,n) = par(j, n, S(i, j)) with { S(i,i) = _; S(i,j) = !; };
-
-// interleave(m,n) : interleave m*n cables : x(0), x(m), x(2m), ..., x(1),x(1+m), x(1+2m)...
-//interleave(m,n) = bus(m*n) <: par(i, m, par(j, n, selector(i+j*m,m*n)));
-
-// interleave(row,col) : interleave row*col cables from column order to row order.
-// input : x(0), x(1), x(2) ..., x(row*col-1)
-// output: x(0+0*row), x(0+1*row), x(0+2*row), ..., x(1+0*row), x(1+1*row), x(1+2*row), ...
-interleave(row,col) = bus(row*col) <: par(r, row, par(c, col, selector(r+c*row,row*col)));
-
// butterfly(n) : addition then substraction of interleaved signals :
xbutterfly(n) = (bus(n/2), par(k, n/2, twiddle_mult(k, n))) <: interleave(n/2,2), interleave(n/2,2) : par(i, n/2, pcplx_add), par(i, n/2, pcplx_sub);